FAURE Etienne

Research engineer
Team : ALSOC
Departure date : 06/30/2011
https://lip6.fr/Etienne.Faure

Departure date : 06/30/2011

2004-2011 Publications

2011
- D. Genius, E. Faure, N. Pouillon : “Mapping a Telecommunication Application on a Multiprocessor System-on-Chip”, chapter in Algorithm-Architecture Matching for Signal and Image Processing, vol. 73, Lecture Notes in Electrical Engineering, pp. 53-77, (Springer LNEE), (ISBN: 978-90-481-9964-8) (2011)
2010
- E. Faure, M. Benabdenbi, F. Pêcheux : “Distributed online software monitoring of manycore architectures”, 16^th IEEE International On-Line Testing Symposium, Corfou Island, Greece, pp. 56-61, (IEEE) (2010)
- E. Faure, G. Marchesan Almeida, M. Benabdenbi, P. Benoit, F. Clermidy, F. Pêcheux, G. Sassatelli, L. Torres : “An In-Memory Monitoring Database For Self Adaptive MP²SoCs”, IEEE International Conference on Design and Architectures for Signal and Image Processing, Edimbourg, United Kingdom, pp. 97-104 (2010)
2009
- A. Greiner, E. Faure, N. Pouillon, D. Genius : “A Generic Hardware / Software Communication Middleware for Streaming Applications on Shared Memory Multi Processor Systems-on-Chip”, FDL Forum on Specification & Design Languages, Nice, France, pp. 1-4 (2009)
- M. Benabdenbi, F. Pêcheux, E. Faure : “Online test and monitoring of multiprocessor socs : A software-based approach”, LATW’09 : Proceedings of the 10^th Latin America Test Workshop, Buzios, Rio de Janeiro, Brazil, pp. 1-6, (IEEE) (2009)
2008
- E. Faure, D. Genius : “Telecommunication Application Modelling with Multi Writer Multi Reader Channels: a Case Study”, FDL Forum on Specification & Design Languages, Stuttgart, Germany, pp. 241-242, (IEEE) (2008)
2007
- E. Faure : “Communications matériel/logiciel dans les ystèmes sur puce multi-processeurs orientés télécommunications”, thesis, phd defence 04/27/2007, supervision Greiner, Alain (2007)
- D. Genius, E. Faure, N. Pouillon : “Deploying a Telecommunication on Multiprocessor Systems-on-Chip”, International Conference on Design and Architectures for Signal and Image Processing, Grenoble, France, pp. 1-8 (2007)
2006
- E. Faure, A. Greiner, D. Genius : “A generic hardware/software communication mechanism for Multi-Processor System on Chip, Targeting Telecommunication Applications”, ReCoSoC Reconfigurable Communication-centric SoCs, Montpellier, France, pp. 237-242 (2006)
2004
- S. Berrayana, E. Faure, D. Genius, F. Pétrot : “Modular on chip multi processor for routing applications”, Euro-Par 2004 - 10^th European Conference on Parallel computing, vol. 3149, Lecture Notes in Computer Science, Pise, Italy, pp. 847-855, (Springer) (2004)
- I. Augé, F. Pétrot, R. Buchmann, F. Donnet, P. Gomez, E. Faure : “Disydent : un environnement pour la conception de systèmes numériques synchrones”, SCS congrès international de Signaux Circuits et Systèmes, Monastir, Tunisia, pp. 72-77 (2004)
- I. Augé, F. Pétrot, R. Buchmann, F. Donnet, P. Gomez, E. Faure : “Intégration sur plate-forme matérielle/logicielle de spécifications C parallèles”, Annals of Telecommunications - annales des télécommunications, vol. 59 (7-8), pp. 807-837, (Springer) (2004)