Équipes actuelles : | ALMASTY ALSOC APR BD CIAN ComplexNetworks DECISION DELYS LFI MOCAH MoVe NPA PEQUAN PolSys QI RO SMA SYEL |
Ancienne équipe : | ACASA |
- M. Aberbour, H. Mehrez, F. Durbin, J. Haussy, P. Lalande, A. Tissot : “A System-On-A-Chip for Pattern Recognition Architecture and Design Methodology”, CAMP 2000 - Fifth International Workshop on Computer Architectures for Machine Perception, Padova, Italy, pp. 155-162, (IEEE Computer Society) [Aberbour 2000]
- H. Aboushady, Y. Dumonteix, M.‑M. Rosset‑Louërat, H. Mehrez : “Efficient Polyphase Decomposition of Comb Decimation Filters in Sigma-Delta Analog-to-Digital Converters”, 43rd IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2000), Lansing, MI, United States, pp. 432-435, (IEEE) [Aboushady 2000]
- Y. Bajot, H. Mehrez : “GSM EFR Vocoder on a Configurable DSP Core, A Quantitative Analysis”, International Conference On Signal Processing Applications and Technologies (ICSPAT 2000), Dallas, Texas, United States, pp. 1-6 [Bajot 2000]
- M. Benabdenbi, W. Maroufi, M. Marzouki : “CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip”, Design Automation and Test in Europe Conference (DATE'2000), Paris, France, pp. 141-145, (IEEE) [Benabdenbi 2000]
- J.‑Y. Brunel, W. Kruijtzer, A. Kenter, F. Pétrot, L. Pasquier, E. De Kock, W. Smits : “COSY Communication IP's”, 37th Design Automation Conference (DAC2000), Los Angeles, CA, United States, pp. 406-409, (ACM) [Brunel 2000]
- P. Bukovjan, L. Ducerf‑Bourbon, M. Marzouki : “Cost/Quality Trade-off in Synthesis for BIST”, 1st IEEE Latin America Test Workshop (LATW), Rio de Janeiro, Brazil, pp. 110-115 [Bukovjan 2000a]
- P. Bukovjan, L. Ducerf‑Bourbon, M. Marzouki : “Cost/Quality Trade-off in Synthesis for Scan”, 3rd International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Slomenice, Slovakia [Bukovjan 2000b]
- R. Chotin, Y. Dumonteix, H. Mehrez : “Use of Redundant Arithmetic on Architecture and Design of a High Performance DCT Macro-bloc Generator”, 15th Design of Circuits and Integrated Systems Conference (DCIS), Montpellier, France, pp. 428-433 [Chotin 2000]
- M. Dessouky, A. Kaiser : “A 1V 1mW Digital-Audio Delta-Sigma Modulator with 88dB Dynamic Range using Local Switch Bootstrapping”, Custom Integrated Circuits Conference (CICC'00), Orlando, FL, United States, pp. 13-16, (IEEE) [Dessouky 2000a]
- M. Dessouky, A. Kaiser : “Very Low-Voltage Fully-Differential Amplifier for Switched-Capacitor Applications”, IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland, pp. 441-444, (IEEE) [Dessouky 2000b]
- M. Dessouky, M.‑M. Rosset‑Louërat : “A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits”, 1st International Symposium on Quality Electronic Design (ISQED 2000), San Jose, CA, United States, pp. 291-298, (IEEE) [Dessouky 2000c]
- M. Dessouky, M.‑M. Rosset‑Louërat, J. Porte : “Layout-Oriented Synthesis of High Performance Analog Circuits”, Design Automation and Test in Europe Conference (DATE'2000), Paris, France, pp. 53-57, (IEEE) [Dessouky 2000d]
- K. Dioury, A. Lester, A. Debreil, G. Avot, A. Greiner, M.‑M. Rosset‑Louërat : “Hierarchical Static Timing Analysis at Bull with HiTas”, Design Automation and Test in Europe Conference User Forum (DATE'2000), Paris, France, pp. 55-60 [Dioury 2000]
- L. Ducerf‑Bourbon, P. Bukovjan, M. Marzouki : “TACOS: A Testability Allocation and Control System”, IEEE European Test Workshop (ETW), Cascais, Portugal [Ducerf-Bourbon 2000]
- Y. Dumonteix, H. Aboushady, H. Mehrez, M.‑M. Rosset‑Louërat : “Low-power Comb Decimation Filter Using Polyphase Decomposition For Mono-bit Sigma-Delta Analog-to-Digital Converters”, International Conference On Signal Processing Applications and Technologies (ICSPAT 2000), vol. 1, Dallas, Texas, United States, pp. 432-435 [Dumonteix 2000a]
- Y. Dumonteix, H. Mehrez : “A family of redundant multipliers dedicated to fast computation for signal processing”, IEEE International Symposium on Circuits and Systems (ISCAS 2000), vol. 5, Geneva, Switzerland, pp. 325-328, (IEEE) [Dumonteix 2000b]
- P. Guerrier, A. Greiner : “A Generic Architecture for On-chip Packet-switched Interconnections”, Design Automation and Test in Europe Conference (DATE'2000), Paris, France, pp. 250-256, (IEEE) [Guerrier 2000]
- D. Hommais, F. Pétrot, I. Augé : “Une approche pour la conception des systèmes intégrés”, 3èmes Journées Nationales du Réseau Doctoral de Micro-électronique (JNRDM 2000), Montpellier, France, pp. 76-77 [Hommais 2000]
- A. Khouas, A. Derieux : “Analog Fault Detection based on Statistical Analysis”, 6th IEEE International Mixed Signal Testing Workshop (IMSTW), Montpellier, France, pp. 27-31 [Khouas 2000a]
- W. Maroufi, M. Benabdenbi, M. Marzouki : “Controlling the CAS-BUS TAM with IEEE 1149.1 TAP: A Solution for Systems-On-a-Chip Testing”, 4th IEEE International Workshop on Testing Embedded Core-based Systems (TECS'00), Montréal, Canada [Maroufi 2000a]
- W. Maroufi, M. Benabdenbi, M. Marzouki : “Solving the I/O Bandwidth Problem in System on a Chip Testing”, XIII Symposium on Integrated Circuits and Systems Design (SBCCI'00), Manaus, Brazil, pp. 9-14, (IEEE) [Maroufi 2000b]
- F. Pétrot, D. Hommais : “A Generic Programmable Arbiter with Default Master Grant”, IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland, pp. 749-752, (IEEE) [Pétrot 2000]
- R. Ruiloba, Ph. Joly, C. Thiénot, C. Seyrat : “A Description Scheme for Video Editing Work”, ISO/IEC JTC1/SC29/WG11, Noordwijkerhout, Netherlands, pp. m5714 [Ruiloba 2000]
- C. Thiénot, C. Seyrat, P. Faudemay, Ph. Joly : “Status of the MPEG-7 parser”, ISO/IEC JTC1/SC29/WG11, Noordwijkerhout, Netherlands, pp. m5767 [Thiénot 2000a]
- C. Thiénot, C. Seyrat, Ph. Joly : “A vector datatype for the DDL”, ISO/IEC JTC1/SC29/WG11, Noordwijkerhout, Netherlands, pp. m5889 [Thiénot 2000b]
- L. Vuillemin, P. Bazargan Sabet : “Timed simulation of VLSI circuits using a FPGA net”, Applied Informatics (IASTED AI 2000), Innsbruck, Austria [Vuillemin 2000]
- A. Zerrouki, J. Dunoyer, F. Wajsbürt, A. Derieux : “Design of the Hadamard Coprocessor with the Alliance CAD System carried by Post-Graduating Students”, 3rd European Workshop on Microelectronics Education (EWME), Aix En Provence, France, pp. 265-268, (Springer) [Zerrouki 2000a]
- A. Zerrouki, O. Glück, J.‑L. Desbarbieux, A. Fenyö, A. Greiner, C. Spasevski, F. Wajsbürt, F. Silva, E. Dreyfus : “The MPC Parallel Computer : Hardware, Low-level Protocols and Performances”, Parallel and Distributed Computing and Systems (PDCS 2000), vol. 1, Las Vegas, United States, pp. 87-92 [Zerrouki 2000b]