Équipes actuelles : | ALMASTY ALSOC APR BD CIAN ComplexNetworks DECISION DELYS LFI MOCAH MoVe NPA PEQUAN PolSys QI RO SMA SYEL |
Ancienne équipe : | ACASA |
- H. Aboushady, E. De Lira Mendes, M. Dessouky, P. Loumeau : “A Current-Mode Continuous-Time Sigma-Delta Modulator with Delayed Return-to-Zero Feedback”, International Symposium on Circuits and Systems (ISCAS'99), Orlando, FL, United States, pp. 360-363, (IEEE) [Aboushady 1999a]
- H. Aboushady, M. Dessouky, E. De Lira Mendes, P. Loumeau : “A Third-Order Current-Mode Continuous-Time Sigma-Delta Modulator”, IEEE International Conference on Electronic Circuits and Systems (ICECS'99), Paphos, Cyprus, pp. 1697-1700, (IEEE) [Aboushady 1999b]
- F. Alves Barbosa da Silva, I. Scherson : “Bounds on Gang Scheduling Algorithms”, 2nd International Conference on Parallel Computing Systems, Ensenada, Mexico [Alves Barbosa da Silva 1999a]
- F. Alves Barbosa da Silva, I. Scherson : “Concurrent Gang: Towards a Flexible and Scalable Gang Scheduler”, 11th Symposium on Computer Architecture and High Performance Computing, Natal, Brazil [Alves Barbosa da Silva 1999b]
- F. Alves Barbosa da Silva, I. Scherson : “Improvements in Parallel Job Scheduling Using Gang Service”, International Symposium on Parallel Architectures Algorithms and Networks (I-SPAN'1999), Freemantle, Australia, pp. 268-273, (IEEE) [Alves Barbosa da Silva 1999c]
- F. Alves Barbosa da Silva, I. Scherson : “Towards Flexibility and Scalability in Parallel Job Scheduling”, 11th IASTED International Conference on Parallel and Distributed Computing and Systems, Cambridge, United States [Alves Barbosa da Silva 1999d]
- G. Avot, M.‑M. Rosset‑Louërat : “Influence et prise en compte des capacités de diaphonies dans la conception d'outils d'analyse temporelle pour les technologies profondément submicroniques.”, Colloque CAO de Circuits Intégrés et Systèmes GDR 732, Aix-en-Provence, France, pp. 232-235 [Avot 1999]
- Y. Bajot, H. Mehrez : “A Macro-Block Based Methodology for ASIP Core Design”, International Conference On Signal Processing Applications and Technologies (ICSPAT'99), Orlando, FL, United States, pp. 302-305 [Bajot 1999]
- J.‑Y. Brunel, Y. Watanabe, L. Lavagno, F. Pétrot : “COSY : levels of interfaces for modules used to create a video system on chip”, Business and work in the information society: new technologies and applications (EMMSEC'99), Stockholm, Sweden, pp. 772-778, (IOS Press) [Brunel 1999]
- P. Bukovjan, M. Marzouki, W. Maroufi : “Design for Testability Reuse in Synthesis for Testability”, XII Symposium on Integrated Circuits and Systems Design (SBCCI'99), Natal, RN, Brazil, pp. 206-209, (IEEE) [Bukovjan 1999a]
- P. Bukovjan, M. Marzouki, W. Maroufi : “Testability Analysis and Cost/Quality Trade-off in Synthesis for Testability”, 4th IEEE European Test Workshop (ETW'99), Constance, Germany [Bukovjan 1999b]
- P. Bukovjan, M. Marzouki, W. Maroufi : “Testability Analysis in High-Level Synthesis”, 10th European Workshop on Dependable Computing (EWDC), Vienna, Austria [Bukovjan 1999c]
- M. Dessouky, A. Greiner, M.‑M. Rosset‑Louërat : “CAIRO : A hierarchical layout language for analog circuits”, Mixed Design of Integrated Circuits and Systems (MIXDES'99), Krakow, Poland, pp. 105-110 [Dessouky 1999a]
- M. Dessouky, A. Kaiser : “Circuit à capacités commutées fonctionnant en mode _rail-to-rail_ à très basse tension”, Journées Nationales du Réseau Doctoral de Micro-électronique, Bordeaux, France [Dessouky 1999b]
- M. Dessouky, A. Kaiser : “Circuits a capacités commutées fonctionnant en mode "rail-to-rail" à très basse tension”, 2ème Journées Francophones d'études Faible Tension Faible Consommation (FTFC'99), Paris, France, pp. 25-28 [Dessouky 1999c]
- M. Dessouky, A. Kaiser : “Rail-to-Rail Operation of Very Low Voltage CMOS Switched-Capacitor Circuits”, International Symposium on Circuits and Systems (ISCAS'99), Orlando, FL, United States, pp. 144-147, (IEEE) [Dessouky 1999e]
- M. Dessouky, J. Porte, M.‑M. Rosset‑Louërat : “Synthèse de circuits faible tension CMOS analogiques”, 2ème Journées Francophones d'études Faible Tension Faible Consommation (FTFC'99), Paris, France, pp. 126-130 [Dessouky 1999f]
- M. Dessouky, J. Porte, M.‑M. Rosset‑Louërat : “TANIS : Un outil pour la synthèse de circuits CMOS analogiques”, Colloque CAO de Circuits Intégrés et Systèmes GDR 732, Aix-en-Provence, France, pp. 186-189 [Dessouky 1999g]
- K. Dioury, A. Greiner, M.‑M. Rosset‑Louërat : “Hierarchical Static Timing Analysis for CMOS ULSI Circuits”, International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU'99), Monterey, CA, United States, pp. 65-70 [Dioury 1999]
- F. Dromard, Y. Body, M.‑M. Paget, A. Greiner, P. Bazargan Sabet, F. Pétrot : “Interactive Learning of Processor Architecture”, 5th International Conference on Computer Aided Engineering Education (CAEE'99), Sofia, Bulgaria, pp. 123-129 [Dromard 1999]
- G. Durand, C. Montacié, M.‑J. Caraty, P. Faudemay : “Audio-video feature correlation: faces and speech”, Multimedia Storage and Archiving Systems IV, vol. 3846, SPIE Proceedings, Boston, MA, United States, pp. 102-112, (SPIE) [Durand 1999a]
- G. Durand, P. Faudemay : “Extraction of Composite Visual Objects from Audiovisual Materials”, Multimedia Storage and Archiving Systems IV, vol. 3846, SPIE Proceedings, Boston, MA, United States, pp. 194-203, (SPIE) [Durand 1999b]
- P. Faudemay, C. Thiénot, C. Seyrat : “Basic Semantic for descriptions”, 48th MPEG meeting, Vancouver, Canada, pp. m4780 [Faudemay 1999a]
- P. Faudemay, Ph. Joly, C. Thiénot, C. Seyrat : “A proposal for constraint expression in an XML class based DDL”, th MPEG meeting, Seoul, Korea, Republic of, pp. m4542 [Faudemay 1999b]
- P. Faudemay, Ph. Joly, C. Thiénot, C. Seyrat : “An Extensible DDL Framework based on RDF and Ontologies”, MPEG proposal p625b, XX, France [Faudemay 1999c]
- P. Faudemay, Ph. Joly, C. Thiénot, C. Seyrat : “Video Editing Work Description Scheme”, MPEG proposal p624, XX, [Faudemay 1999d]
- P. Guerrier, A. Greiner : “A Scalable Architecture for System-on-Chip Interconnections”, Sophia Antipolis Forum on MicroElectronics (SAME'99), Sophia Antipolis, France, pp. 90-93 [Guerrier 1999]
- D. Hommais, F. Pétrot : “Une gestion efficace des boucles combinatoires pour la simulation au cycle près de systèmes matériel-logiciel”, Colloque CAO de Circuits Intégrés et Systèmes GDR 732, Aix-en-Provence, France, pp. 266-269 [Hommais 1999]
- F. Ilponse, P. Bazargan Sabet : “CRISE : Un Outil d'Evaluation des Risques dus à la Diaphonie dans les Circuits Intégrés fortement Sub-Microniques”, Colloque CAO de Circuits Intégrés et Systèmes GDR 732, Aix-en-Provence, France [Ilponse 1999]
- L. Jacomme, F. Pétrot, Rajesh K. Bawa : “Formal Analysis of Single Wait VHDL processes for Semantic Based Synthesis”, 12th IEEE International Conference on VLSI Design, Goa, India, pp. 151-156, (IEEE) [Jacomme 1999]
- A. Khouas, A. Derieux : “Methodology for Fast and Accurate Analog Production Test Optimization”, 5th IEEE International Mixed Signal Testing Workshop (IMSTW), Whistler, British Columbia, Canada, pp. 215-219 [Khouas 1999a]
- A. Khouas, A. Derieux : “Optimisation des Tests de Production pour les Circuits Analogiques avec prise en compte des tolérances”, Colloque CAO de Circuits Intégrés et Systèmes GDR 732, Aix-en-Provence, France [Khouas 1999b]
- A. Khouas, A. Derieux : “Optimization of Production Tests for Analog Circuits under Parameter Variations”, Mixed Design of Integrated Circuits and Systems (MIXDES'99), Krakow, Poland [Khouas 1999c]
- A. Khouas, A. Derieux : “Speed-up of High Accurate Analog Test Stimulus Optimization”, International Test Conference (ITC), Atlantic City, NJ, United States, pp. 230-236, (IEEE) [Khouas 1999d]
- A. Khouas, M. Dessouky, A. Derieux : “Optimized Statistical Analog Fault Simulation”, IEEE Asian Test Symposium (ATS'99), Shanghai, China, pp. 227-232, (IEEE) [Khouas 1999e]
- F. Pétrot : “Cycle Accurate System Simulation”, Medea-Esprit Conference, Antwerpen, Belgium [Pétrot 1999]
- R. Ruiloba, Ph. Joly, C. Thiénot, C. Seyrat : “An Analytic Description Scheme for Editing Work”, ISO/IEC JTC1/SC29/WG11, Maui, HI, United States, pp. m5346 [Ruiloba 1999a]
- R. Ruiloba, Ph. Joly, S. Marchand‑Maillet, G. Quenot : “Towards a Standard Protocol for the Evaluation of Video-to-Shots Segmentation Algorithms”, European Workshop on Content Based Multimedia Indexing, Toulouse, France, pp. 41-48 [Ruiloba 1999b]
- C. Seyrat, C. Thiénot, P. Faudemay : “A DDL version for the AVIR project”, 49th MPEG meeting, Melbourne, Australia, pp. m5079 [Seyrat 1999]
- A. Turier, L. Ben Ammar, A. Amara : “Architecture of low-power embedded ROMs”, 8th International Symposium on Integrated Circuits Devices & Systems (ISIC'99), Singapore, Singapore, pp. 467-470 [Turier 1999a]
- A. Turier, L. Ben Ammar, A. Amara : “Générateur de ROMs basse consommation”, 2ème Journées Francophones d'études Faible Tension Faible Consommation (FTFC'99), Paris, France, pp. 82-87 [Turier 1999b]
- L. Vuillemin, P. Bazargan Sabet : “Simulation logico temporelle de circuits VLSI à l'aide d'un réseau de FPGA”, Colloque CAO de Circuits Intégrés et Systèmes GDR 732, Aix-en-Provence, France [Vuillemin 1999]