LIP6 2004/004
- Thesis
Synthèse de Haut Niveau Contrôlée par l'Utilisateur - F. Donnet
- 200 pages - 01/20/2004- document en - http://www.lip6.fr/lip6/reports/2004/lip6.2004.004.pdf - 1,319 Ko
- Contact : francois.donnet (at) nullasim.lip6.fr
- Ancien Thème : ASIM
- Keywords : high level synthesis, dedicated coprocessor, working frequency, surface, parallelism, data control dominated, scheduling, allocation, binding, micro-architecture, integrated circuit.
- Publisher : Francois.Dromard (at) nulllip6.fr
The high level synthesis for dedicated coprocessor is a very complex problem. It has to cope with different aims like the working frequency, the surface, the consumption, etc. . These criteria specify the generated circuit and the high level synthesis tool efficiency. This Ph.D thesis presents a two steps approach in the high level synthesis. In the first step, we minimize the surface and maximize the parallelism. In the second step, the circuit is modified to take in account the electrical characteristics and to fetch the wanted working frequency. The synthesis tool has to optimize the circuit on a very few number of criteria which are specified by the designer. By the way, for the data control dominated circuits, the aim can't be qualified by a global guidance, because a such guidance is unadapted and can't qualify the optimization level. The collateral effects on the other characteristics of the circuit aren't controlled by the designer. The respect of the global guidance is difficult to reach by the synthesis algorithms. The scheduling, allocation and binding phases of the high level synthesis are NP-complex. Most of these problems are solved with heuristics which have unpredictable consequences on the circuit characteristics. The automation of the high level synthesis needs a very precise description of the designer's attempts. We are studying in this Ph.D thesis the necessary guidances to precisely aim a solution and keep the compatibility with our two-phases approach. We have to reduce the guidance definition to facilitate the designer's work and be aware of the loss of efficiency which has been induced.