LIP6 2002/015
- Thesis
Étude d'une architecture de commutateur ATM haut débit avec respect de la qualité de service - A. Stoica
- 151 pages - 05/03/2002- document en - http://www.lip6.fr/lip6/reports/2002/lip6.2002.015.pdf - 3,054 Ko
- Contact : Alexandru.Stoica (at) nulllip6.fr
- Ancien Thème : ASIM
- Keywords : ATM, network, high throughput, QoS, quality of service, architecture, switch, queuing
- Publisher : Francois.Dromard (at) nulllip6.fr
The guarantee of the quality of services of the high throughput networks became in the recent years a major objective of the telecommunications industry. Our research is oriented on ATM switching architectures and aims the conception of switches characterized by an elevated valence (throughput and number of connections) and which guarantee a superior quality of services. The thesis is divided in two parts: In the first part we have studied how to improve an existing switching ATM architecture, constructed around a throughput reservation bus (and using therefore the technique of circuit commutation). This architecture allows to provide absolute guarantees in term of throughput, and we looked forward to increase the throughput and the number of connections of this architecture who possesses real assets concerning the quality of services. The second part of the thesis studies an architecture in which the switching device use the packets commutation principle (meaning therefore that throughput reservation isn't used). Concerning this type of architecture, the main reason of the deterioration of the quality of services is the bottleneck represented by the packets commutation matrix. The matrixes using packets commutation are priori not conceived to manage priorities. The performance in terms of quality of services of this type of architecture depends essentially of the scheduling strategies used for the queues situated at the input ports. We suggest a switching architecture based on the consignment of notifications used to sort the incoming traffic in order to improve the global quality of service of this architecture. The performances of a generic switching architecture with packet commutation using this technique was evaluated by simulation.