LIP6 1999/027
- Thesis
Modèles et méthodes probabilistes pour l'évaluation de la consommation des circuits intégrés VLSI - J. Dunoyer
- 325 pages - 07/09/1999- document en - http://www.lip6.fr/lip6/reports/1999/lip6.1999.027.ps.tar.gz - 11,900 Ko
- Contact : Julien.Dunoyer (at) nulllip6.fr
- Ancien Thème : ASIM
- Keywords : Integrated circuits verification, power consumption models, power estimation techniques, probabilistic simulation, symbolic simulation, static analysis
- Publisher : Francois.Dromard (at) nulllip6.fr
This thesis presents an alternate solution to simulation for electrical power consumption evaluation of VLSI integrated circuits. Considering a gate-level net-list, power consumption of each gate is modeled by a state transition graph, each transition being characterized in terms of energy. This thesis focuses on the transition frequency calculation which cannot be statically performed since it is strongly application dependent. To perform such a calculation, we develop a probabilistic approach based on a new stochastic model of the signal. Each signal is characterized by a steady-state probability, a cycle-based transition density, and a periodical series of instantaneous transition probabilities. Such a model allows to consider the synchronous behaviour of memory elements without neglecting transient states of combinational parts. Probabilities are propagated through the gates by means of an event-driven simulation, involving the calculation of probabilistic transfer functions using Shannon's expansion. Correlation effects are overcome by building Supergates on sets of weakly dependent variables. To optimize this solution, we introduce a new heuristic which relies on the expression of the error induced by reconvergent fanout and which takes into account both gate functions and signal probabilities. To compute instantaneous transition probabilities, we propose the decomposition of Supergates into a set of transfer paths that result in distinct transfer functions. This method takes into account spatial and temporal correlations and expresses the generation and propagation of glitches. All these concepts are implemented in the software prototype PROPAGATE. The results obtained on complex circuits conclusively prove the relevance of our theory and show that a probabilistic analysis of power consumption of VLSI integrated circuits can be a precise and rapid alternative to simulation.