CHAPUT Jean-Paul
Engineer - LIP6
Tel: +33 1 44 27 53 99, Jean-Paul.Chaput (at) nulllip6.fr
https://lip6.fr/Jean-Paul.Chaput
- Sorbonne Université - LIP6
Boîte courrier 169
Couloir 25-26, Étage 4, Bureau 404
4 place Jussieu
75252 PARIS CEDEX 05
FRANCE
Tel: +33 1 44 27 53 99, Jean-Paul.Chaput (at) nulllip6.fr
https://lip6.fr/Jean-Paul.Chaput
2005-2019 Publications
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2019
- J.‑P. Chaput, M.‑M. LouĂ«rat, R. Chotin‑Avot, A. Satin : “RISC-V design using Free Open Source Software”, the RISC-V Week, Paris, France (2019)
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2018
- N. Shimizu, J. Akita, M.‑M. LouĂ«rat, Haralampos‑G. Stratigopoulos, J.‑P. Chaput, D. Galayko : “Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping”, 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, (IEEE) (2018)
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2017
- E. Lao, M.‑M. LouĂ«rat, J.‑P. Chaput : “Highly configurable place and route for analog and mixed-signal circuits”, PhD Forum at Design, Automation and Test in Europe Conference (DATE), Lausanne, Switzerland (2017)
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2016
- E. Lao, M.‑M. LouĂ«rat, J.‑P. Chaput : “Semi-Automated Analog Placement based on Margin Tolerances”, The 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016), Kyoto, Japan (2016)
- E. Lao, M.‑M. LouĂ«rat, J.‑P. Chaput : “Semi-automated analog placement”, Electronics, Circuits and Systems (ICECS), 2016 IEEE International Conference on, Monte Carlo, Monaco, pp. 432-433 (2016)
- H. Zou, Y. Moursy, R. Iskander, J.‑P. Chaput, M.‑M. LouĂ«rat : “An Adaptive Mesh Refinement Strategy of Substrate Modeling for Smart Power ICs”, 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, pp. 2358-2361 (2016)
- H. Zou, Y. Moursy, R. Iskander, A. Steinmair, H. Gensinger, Eh. Seebacher, J.‑P. Chaput, M.‑M. LouĂ«rat : “Using CAD Tool for Substrate Parasitic Modeling in Smart Power Technology”, IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 2323-2333, (IEEE) (2016)
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2015
- M. Barnasconi, M. Dietrich, K. Einwich, Th. Vörtler, J.‑P. Chaput, M.‑M. LouĂ«rat, F. PĂȘcheux, Zh. Wang, Ph. Cuenot, I. Neumann, Th. Nguyen, R. Lucas, E. Vaumorin : “UVM-SystemC-AMS Framework for System-Level Verification and Validation of Automotive Use Cases”, IEEE Design & Test, pp. 76-86, (IEEE) (2015)
- H. Zou, Y. Moursy, R. Iskander, J.‑P. Chaput, M.‑M. LouĂ«rat, C. Stefanucci, P. Buccella, M. Kayal, J.‑M. Sallese, Th. Gneiting, H. Alius, A. Steinmair, Eh. Seebacher : “A CAD integrated solution of substrate modeling for industrial IC design”, 2015 20th International Mixed-Signal Testing Workshop (IMSTW), Paris, France (2015)
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2014
- T. Maehne, Zh. Wang, L. Andrade Porras, B. Vernay, C. Ben Aoun, J.‑P. Chaput, M.‑M. LouĂ«rat, F. PĂȘcheux, A. Krust, G. Schroepfer, M. Barnasconi, K. Einwich, F. Cenni, O. Guillaume : “UVM-SystemC-AMS based Framework for the Correct by Construction Design of MEMS in their Real Heterogeneous Application Context,”, IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Marseille, France, pp. 862-865 (2014)
- Th. Vörtler, Th. Klotz, K. Einwich, Y. Li, Zh. Wang, M.‑M. LouĂ«rat, J.‑P. Chaput, F. PĂȘcheux, R. Iskander, M. Barnasconi : “Enriching UVM in SystemC with AMS extensions for randomization and coverage”, Design and Verification Conference and Exhibition (DVCON Europe), Munich, Germany (2014)
- R. Lucas, E. Vaumorin, Ph. Cuenot, Y. Li, Zh. Wang, M.‑M. LouĂ«rat, J.‑P. Chaput, F. PĂȘcheux, R. Iskander, M. Barnasconi, Th. Vörtler, K. Einwich : “Generation of UVM compliant Test Benches for Automotive Systems using IP-XACT with UVM-SystemC and SystemC AMS extensions”, Design and Verification Conference and Exhibition (DVCON Europe), Munich, Germany (2014)
- H. Zou, Y. Moursy, R. Iskander, M.‑M. LouĂ«rat, J.‑P. Chaput : “A novel CAD framework for substrate modeling”, 10th Conference on Ph.D Research in Microelectronics and electronics, Grenoble, France, pp. 1-4, (IEEE) (2014)
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2013
- Y. Moursy, S. Afara, P. Buccella, C. Stefanucci, R. Iskander, M. Kayal, J.‑M. Sallese, M.‑M. LouĂ«rat, J.‑P. Chaput, M. Thomas Tomasevic , S. Ben Dhia, A. Boyer, B. Guegan, V. Poletto, A. Roggero, T. Cavioni, E. Novarini, Eh. Seebacher, A. Steinmair, P. Tisserand, D.‑M. Ton, Th. Bousquet, Th. Gneiting : “AUTOMICS: A novel approach for substrate modeling for Automotive applications”, 18th IEEE European Test Symposium, Avignon, France (2013)
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2007
- S. Belloeil, D. Dupuis, Ch. Masson, J.‑P. Chaput, H. Mehrez : “Stratus: A procedural circuit description language based upon Python”, ICM International Conference on Microelectronics, Cairo, Egypt, pp. 275-278, (IEEE) (2007)
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2006
- S. Belloeil, J.‑P. Chaput, R. Chotin‑Avot, Ch. Masson, H. Mehrez : “Stratus : Un environnement de dĂ©veloppement de circuits”, JP CNFM JournĂ©es pĂ©dagogiques du CNFM, Saint-Malo, France, pp. 57-61 (2006)
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2005
- Ch. Alexandre, H. ClĂ©ment, J.‑P. Chaput, M. Sroka, Ch. Masson, R. Escassut : “TSUNAMI: An Integrated Timing-Driven Place And Route Research Platform”, DATE 2005 - Design Automation and Test in Europe Conference, vol. 2, Munich, Germany, pp. 920-921, (IEEE) (2005)