DIOURY Karim

PhD student at Sorbonne University - ASIM
https://www.lip6.fr/production/publications-rapport-fiche.php?RECORD_KEY%28rapports%29=id&id(rapports)=82

Supervision : Alain GREINER

Analyse temporelle hiérarchique des circuits VLSI à très haute densité d'intégration

Defence : 09/18/1998

Departure date : 10/01/1998

1997-2002 Publications

All Journal articles Communications Thesis

2002
- G. Avot, A. Greiner, M.‑M. Louërat, K. Dioury, A. Lester, A. Debreil : “Use of MutiPhase Stability Intervals to handle Crosstalk with the Timing Analyzer hiTas”, Design Automation and Test in Europe Conference (DATE'2002), Paris, France, pp. 112-116 (2002)
2000
- K. Dioury, A. Lester, A. Debreil, G. Avot, A. Greiner, M.‑M. Rosset‑Louërat : “Hierarchical Static Timing Analysis at Bull with HiTas”, Design Automation and Test in Europe Conference User Forum (DATE'2000), Paris, France, pp. 55-60 (2000)
1999
- K. Dioury, A. Greiner, M.‑M. Rosset‑Louërat : “Hierarchical Static Timing Analysis for CMOS ULSI Circuits”, International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU'99), Monterey, CA, United States, pp. 65-70 (1999)
1998
- K. Dioury : “Analyse temporelle hiérarchique des circuits VLSI à très haute densité d’intégration”, thesis, phd defence 09/18/1998, supervision Greiner, Alain (1998)
- F. Wajsbürt, F. Pétrot, K. Dioury : “Transistor Controlled Slew Rate Process Independent PCI Compliant I/O Buffer with Possible Power/Delay Trade-off”, Microelectronics Journal, vol. 29 (10), pp. 733-740, (Elsevier) (1998)
1997
- F. Wajsbürt, K. Dioury, F. Pétrot : “Low Power, Process Independent, Full Transistor Controlled Slew Rate, PCI Compliant I/O pads”, 21^st International Conference on Microelectronics, Nis, Serbia, pp. 811-814, (IEEE) (1997)
- K. Dioury, A. Greiner, M.‑M. Rosset‑Louërat : “Accurate static timing analysis for deep submicronic CMOS circuits”, International Conference on Very Large Scale Integration (VLSI'97), IFIP - The International Federation for Information Processing, Gramado, Brazil, pp. 439-450, (Springer) (1997)
- K. Dioury, A. Greiner, M.‑M. Rosset‑Louërat : “Analyse Temporelle des Circuits VLSI à Haute Densité d’Intégration Utilisant des Technologies Submicroniques”, 1^er Colloque CAO de Circuits Intégrés et Systèmes, Grenoble, France, pp. 184-187 (1997)