Supervision : Jean-Gabriel GANASCIA

Conception automatique de circuits de l'électronique de puissance à l'aide de simulation qualitative et d'apprentissage

Two past PhD students (2011 - 2014) at Sorbonne University

2000-2018 Publications

• 2018
  • N. Belleville, K. Heydemann, D. Couroussé, Th. Barry, B. Robisson, A. Seriai, H.‑P. Charles : “Automatic Application of Software Countermeasures Against Physical Attacks”, chapter in Cyber-Physical Systems Security, pp. 135-155, (Springer International Publishing), (ISBN: 978-3-319-98934-1) (2018)
  • D. Couroussé, Th. Barry, B. Robisson, N. Belleville, Ph. Jaillon, O. Potin, H. Le Bouder, J.‑L. Lanet, K. Heydemann : “All paths lead to Rome: Polymorphic Runtime Code Generation for Embedded Systems”, Fifth Workshop on Cryptography and Security in Computing Systems, Manchester, United Kingdom, pp. 17-18, (ACM) (2018)
• 2017
  • N. Belleville, Th. Barry, A. Seriai, D. Couroussé, K. Heydemann, B. Robisson, H.‑P. Charles : “The Multiple Ways to Automate the Application of Software Countermeasures against Physical Attacks : Pitfalls and Guidelines”, Cyber-Physical Security Education Workshop, Paris, France (2017)
  • Th. Barry, D. Couroussé, B. Robisson, K. Heydemann : “Automated Combination of Tolerance and Control Flow Integrity Countermeasures against Multiple Fault Attacks”, European LLVM Developers Meeting, Saarbrücken, Germany (2017)
• 2016
  • B. Robisson, M. Agoyan, P. Soquet, S. Le‑Henaff, F. Wajsbürt, P. Bazargan‑Sabet, G. Phan : “Smart security management in secure devices”, Journal of Cryptographic Engineering, (Springer) (2016)
• 2015
  • B. Robisson, M. Agoyan, P. Soquet, S. Le Henaff, F. Wajsbürt, P. Bazargan‑Sabet, G. Phan : “SMART SECURITY MANAGEMENT IN SECURE DEVICES”, PROOFS: Security Proofs for Embedded Systems, Saint-Malo, France (2015)
• 2014
  • N. Moro, K. Heydemann, E. Encrenaz, B. Robisson : “Formal verification of a software countermeasure against instruction skip attacks”, Journal of Cryptographic Engineering, vol. 4 (3), pp. 145-156, (Springer) (2014)
  • N. Moro, K. Heydemann, A. Dehbaoui, B. Robisson, E. Encrenaz : “Fault attacks on two software countermeasures”, TRUDEVICE 2014, Paderborn, Germany (2014)
  • N. Moro, K. Heydemann, A. Dehbaoui, B. Robisson, E. Encrenaz : “Experimental evaluation of two software countermeasures against fault attacks”, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), Arlington, United States, pp. 112-117 (2014)
• 2013
  • N. Moro, A. Dehbaoui, K. Heydemann, B. Robisson, E. Encrenaz : “Electromagnetic fault injection on microcontrollers”, Chip-to-Cloud Security Forum 2013, Nice, France (2013)
  • K. Heydemann, N. Moro, E. Encrenaz, B. Robisson : “Formal verification of a software countermeasure against instruction skip attacks”, PROOFS 2013, Santa-Barbara, United States (2013)
  • N. Moro, A. Dehbaoui, K. Heydemann, B. Robisson, E. Encrenaz : “Electromagnetic fault injection: towards a fault model on a 32-bit microcontroller”, Proceedings of the 10^th workshop on Fault Diagnosis and Tolerance in Cryptography, Santa-Barbara, United States, pp. 77-88 (2013)
• 2012
  • H. Le Bouder, N. Moro, B. Robisson, E. Encrenaz, A. Tria : “Un formalisme commun aux attaques par canaux auxiliaires et par injection de fautes”, Colloque National GDR SOC-SIP 2012, Paris, France (2012)
• 2011
  • M. Nguyen, B. Robisson, M. Agoyan, N. Drach : “Low-cost recovery for the code integrity protection in secure embedded processors”, Symposium on Hardware-Oriented Security and Trust (HOST 2011), San Diego, United States, pp. 99-104 (2011)
  • B. Robisson, M. Agoyan, S. Bouquet, M. Nguyen, S. Le Henaff, P. Soquet, G. Phan, F. Wajsbürt, P. Bazargan‑Sabet, N. Drach : “Management of the security in smart secure devices”, SSI 2010 - Smart Systems Integration, Dresden, Germany, pp. 1-9 (2011)
  • B. Robisson, M. Agoyan, S. Le Henaff, P. Soquet, G. Phan, F. Wajsbürt, P. Bazargan‑Sabet : “Implementation of complex strategies of security in secure embedded systems”, NTMS 2011 - 4^th IFIP International Conference on New Technologies, Mobility and Security, Paris, France, pp. 1-5, (IEEE) (2011)
• 2010
  • M. Agoyan, P. Bazargan Sabet, K. Bekkou, B. Sylvain, S. Le Henaff, E. Lepavec, M. Nguyen, G. Phan, B. Robisson, P. Soquet, F. Wajsbürt : “Smart On Smart”, Colloque « Systèmes embarqués, sécurité et sûreté de fonctionnement », Toulouse, France (2010)
  • M. Agoyan, B. Robisson, M. Nguyen, P. Bazargan‑Sabet, G. Phan, S. Le Henaff : “SOS An innovative secure system architecture”, Cryptarchi, Paris, France (2010)
  • P. Soquet, B. Robisson, M. Agoyan, G. Phan, P. Bazargan Sabet, F. Wajsbürt : “Strategy Of Security on Smart On Smart”, PACA Security Trends In embedded Security, Gardanne, France (2010)
  • M.‑H. Nguyen, B. Robisson, M. Agoyan, N. Drach : “Low-cost fault tolerance on the ALU in simple pipelined processors”, DDECS 2010 - 13^th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Vienne, Austria, pp. 28-31, (IEEE) (2010)
• 2009
  • M. Nguyen, B. Robisson, M. Agoyan, N. Drach : “Evaluation of the Time-Redundant Fault Tolerance on the ALU for Simple Pipelined Processor”, 4^th Annual Austin Conference on Integrated Systems & Circuits, Austin, United States (2009)
• 2001
  • B. Robisson : “Conception automatique de circuits de l’électronique de puissance à l’aide de simulation qualitative et d’apprentissage”, thesis, phd defence 09/21/2001, supervision Ganascia, Jean-Gabriel (2001)
  • B. Robisson, J.‑G. Ganascia : “An algorithm for converting an electrical circuit to a bond graph : a formalization of the inspection method”, Proceedings of the 2001 International Conference on Bond Graph Modeling and Simulation (ICBGM '01), Phoenix, Arizona, Crowne Plaza Hotel, January 7-11, 2001, Phoenix, United States, pp. 199-203, (Society for Computer Simulation International, 2001) (2001)
• 2000
  • B. Robisson, J.‑G. Ganascia : “On the representation of electrical networks”, Proceedings of 43^rd IEEE Midwest Symposium on Circuits And Systems, Lansing, United States, pp. 144-147, (IEEE) (2000)
  • B. Robisson, J.‑G. Ganascia : “Computing a canonical bond graph from a component-connection representation”, Proceedings of SCS Summer Computer Simulation Conference, Vancouver, Canada, pp. 109-113 (2000)