Supervision : Haralampos STRATIGOPOULOS

Analog Hardware Security and Trust

The ongoing globalization and specialization of the integrated circuit (IC) supply chain has led semiconductor companies to share their valuable intellectual property (IP) assets with numerous parties for means of manufacturing, testing, etc. As a consequence, sensitive IPs and ICs are being exposed to untrusted parties, resulting in serious piracy threats such as counterfeiting or reverse engineering. In this thesis we develop methods to secure analog and mixed signal IPs/ICs from piracy threats within the supply chain.

We demonstrate that establishing security and trust for analog and mixed signal IPs and ICs, while still in its infancy, is feasible. The presented techniques have the potential to protect analog and mixed-signal circuits against a large subset of all the possible risk scenarios while inflicting low overheads in terms of area, power and performance. The changes carried out in the ICs' analog sections are subtle, a key requirement for the adoption of our techniques by analog designers.

Phd defence : 03/25/2021

Jury members :

Giorgio DI NATALE, DR CNRS, TIMA, Grenoble [Rapporteur]
Ilia POLIAN, Prof., University of Stuttgart [Rapporteur]
Emmanuelle ENCRENAZ, MCF, Sorbonne Université
Helmut GRÄB, Prof., Technical University Munich
Ozgur SINANOGLU, Prof., NYU Abu Dhabi
Jean-Luc DANGER, Prof., Télécom ParisTech
Marie-Minerve LOUËRAT, CR CNRS, Sorbonne Université
Hassan ABOUSHADY, MCF, Sorbonne Université
Haralampos STRATIGOPOULOS, DR CNRS, Sorbonne Université

2019-2022 Publications

• 2022
  • J. Leonhard, N. Limaye, Sh. Turk, A. Sayed, A. Díaz‑Rizo, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “Digitally-Assisted Mixed-Signal Circuit Security”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41 (8), pp. 2449-2462, (IEEE) (2022)
  • A. Díaz Rizo, J. Leonhard, H. Aboushady, Haralampos‑G. Stratigopoulos : “RF Transceiver Security Against Piracy Attacks”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69 (7), pp. 3169-3173, (Institute of Electrical and Electronics Engineers) (2022)
• 2021
  • J. Leonhard : “Analog Hardware Security and Trust”, thesis, phd defence 03/25/2021, supervision Stratigopoulos, Haralampos (2021)
  • J. Leonhard, M. Elshamy, M.‑M. Louërat, Haralampos‑G. Stratigopoulos : “Breaking Analog Biasing Locking Techniques via Re-Synthesis”, 26^th Asia and South Pacific Design Automation Conference (ASPDAC '21), Tokyo, Japan (2021)
• 2020
  • J. Leonhard, M.‑M. Louërat, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “Mixed-Signal IP Protection Against Piracy Based on Logic Locking”, 32. GI / GMM / ITG - Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Ludwigsburg, Germany (2020)
  • J. Leonhard, A. Sayed, M.‑M. Louërat, H. Aboushady, Haralampos‑G. Stratigopoulos : “Analog and Mixed-Signal IC Security Via Sizing Camouflaging”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (IEEE) (2020)
• 2019
  • J. Leonhard, M.‑M. Louërat, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application”, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Laussane, Switzerland, pp. 185-188, (IEEE) (2019)
  • J. Leonhard, M. Yasin, Sh. Turk, M. Nabeel, M.‑M. Louërat, R. Chotin‑Avot, H. Aboushady, O. Sinanoglu, Haralampos‑G. Stratigopoulos : “MixLock: Securing Mixed-Signal Circuits via Logic Locking”, Design, Automation and Test in Europe (DATE 2019), Proceedings of the 2019 Design, Automation and Test in Europe, Florence, Italy, pp. 84-89 (2019)