Supervision : Marie-Minerve LOUËRAT

Place and Route of analog and mixed-signal CMOS circuits

As the technological processes of integration on silicon evolve by increasing the fine engraving and the integration density, digital processing has become faster at a lower cost in area and power consumption. This reduction in size is made at the expense of analog blocks' precision. Therefore, the uses (set-top box, electric cars, e-health) require analog-digital converters (ADC) increasingly fast and accurate. An interesting approach is to systematically compensate for inaccuracies of analog blocks by digital processing. The idea is to take advantage of the performance offered by digital circuits to release the specifications for analog blocks and globally win area occupation and consumption. Yet, analog-digital mixed circuits designers are faced with a situation where they have to choose between a purely analog design flow or a pure digital design flow, each ignoring the other. An analog circuit is considered as a black box for the digital compensation circuit.

Designers are in charge to deal on their own with signals exchanged between the analog and the digital parts. The objective of this thesis is to define a mixed-signal design environment for digital and analog, at transistor level (sizing) and physical layouts. It will offer the designer a fine control of the transistor level design step, place and route while ensuring partial automation of tasks and a communication of informations on one hand between the sizing step and the physical layouts, and on the other hand, between the analog blocks and digital blocks. We will study in particular an analog router guided by the design guidelines.

Phd defence : 09/14/2018

Jury members :

BEN DHIA Sonia (INSA Toulouse) [Rapporteur]
COUSSY Philippe (Université Bretagne Sud) [Rapporteur]
ALLOATTI Luca (ETH Zurich)
FESQUET Laurent (Grenoble INP)
KOKABI Hamid (Sorbonne Université)
MEHREZ Habib (Sorbonne Université)
LOUERAT Marie-Minerve (CNRS/LIP6)
CHAPUT Jean-Paul (Sorbonne Université/LIP6)

2016-2018 Publications

• 2018
  • E. Lao : “Placement et routage des circuits mixtes analogiques-numériques CMOS”, thesis, phd defence 09/14/2018, supervision Louërat, Marie-Minerve (2018)
• 2017
  • E. Lao, M.‑M. Louërat, J.‑P. Chaput : “Highly configurable place and route for analog and mixed-signal circuits”, PhD Forum at Design, Automation and Test in Europe Conference (DATE), Lausanne, Switzerland (2017)
• 2016
  • E. Lao, M.‑M. Louërat, J.‑P. Chaput : “Semi-Automated Analog Placement based on Margin Tolerances”, The 20^th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016), Kyoto, Japan (2016)
  • E. Lao, M.‑M. Louërat, J.‑P. Chaput : “Semi-automated analog placement”, Electronics, Circuits and Systems (ICECS), 2016 IEEE International Conference on, Monte Carlo, Monaco, pp. 432-433 (2016)